System architectures for infrared pedestrian tracking.
Walczyk, Robert; Balazs, Alexander; Armitage, Alistair; Binnie, David
Dr David Binnie D.Binnie@napier.ac.uk
This paper describes an FPGA-based implementation of a real-time pedestrian detection and tracking system for infrared (IR) video streams. The system includes hardware accelerators for adaptive background subtraction, morphological filtering and connected component labelling (pedestrian detection). Extracted features are provided to an embedded processor core for tracking analysis. The hardware/software co-design is discussed. The implementation is based on the XUP V2P (XC2VP30 FPGA) development board and uses the proprietary embedded design kit. The implementation features a reduced bandwidth scheme, hence the total memory requirement can be handled by the embedded memory blocks of a single FPGA chip.
Walczyk, R., Balazs, A., Armitage, A., & Binnie, D. (2011, June). System architectures for infrared pedestrian tracking. Paper presented at 22nd IET Irish Signals and Systems Conference
|Presentation Conference Type||Conference Paper (unpublished)|
|Conference Name||22nd IET Irish Signals and Systems Conference|
|Start Date||Jun 1, 2011|
|End Date||Jun 1, 2011|
|Deposit Date||Sep 14, 2011|
|Publicly Available Date||Dec 31, 2011|
|Peer Reviewed||Not Peer Reviewed|
|Keywords||Pedestrian detection and tracking; infr-red video stream; FPGA; embedded memory blocks;|
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