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Generalised Reed-Muller ASIC converter.

Almaini, A E A; Burnside, K

Authors

A E A Almaini

K Burnside



Abstract

The paper outlines the design for a new IC for bidirectional conversion between the functional and operational domains of logic funcyions. The circuit can generate all fixed polarities of Generalised Reed-Muller expansions for a given Boolean expression. Since all polarities are computed simmultaneously, they may be compared to find the optimal polarity of the logic function. Further, the chip can convert the positive polarity coefficients of the product terms back to minterm coefficients. The chip is designed using the Mentor Graphic V8.4 and standard cell 0.7 μm CMOS.

Citation

Almaini, A. E. A., & Burnside, K. (1996, October). Generalised Reed-Muller ASIC converter

Start Date Oct 21, 1996
End Date Oct 24, 1996
Publication Date Oct 21, 1996
Deposit Date Jun 9, 2009
Peer Reviewed Peer Reviewed
Pages 73-76
Book Title 2nd International Conference on ASIC
ISBN 7-5439-0940-5
DOI https://doi.org/10.1109/ICASIC.1996.562754
Keywords Integrated circuit; Bidirectional conversion; Functional logic; Operational logic; Optimal polarity determination; Minterm calculation; Mentor Graphic V8.4; CMOS;
Public URL http://researchrepository.napier.ac.uk/id/eprint/2649



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