A Highly Integrated Hardware/Software Co-Design and Co-Verification Platform

Yang, Shufan; Yu, Zheqi

Abstract

This article presents a platform for hardware/software co-design and co-verification with a flexible hardware/software interface. The platform has been applied to verification of a pedestrian tracking application to demonstrate its effectiveness.

Citation

Yang, S., & Yu, Z. (2019). A Highly Integrated Hardware/Software Co-Design and Co-Verification Platform. IEEE Design and Test, 36(1), 23-30. https://doi.org/10.1109/mdat.2018.2841029

• Journal Article Type: Article
• Online Publication Date: May 28, 2018
• Publication Date: 2019-02
• Deposit Date: Feb 18, 2021
• Journal: IEEE Design & Test
• Print ISSN: 2168-2356
• Electronic ISSN: 2168-2364
• Publisher: Institute of Electrical and Electronics Engineers
• Peer Reviewed: Peer Reviewed
• Volume: 36
• Issue: 1
• Pages: 23-30
• DOI: https://doi.org/10.1109/mdat.2018.2841029
• Keywords: Hybrid FPGA-SoCs, ZYNQ, Hardware-Software co-design, Co-verification
• Public URL: http://researchrepository.napier.ac.uk/Output/2744749