Meng Yang
An evolutionary approach for symmetrical field programmable gate array placement.
Yang, Meng; Almaini, A E A; Wang, Lun Yao; Wang, P
Authors
A E A Almaini
Lun Yao Wang
P Wang
Abstract
An evolutionary computation method is used to place a set of different Microelectronics Center of North Carolina (MCNC) benchmark circuits on traditional symmetrical Field Programmable Gate Array (FPGA). The experimental results are compared to the state-of-the-art results from Versatile Placement and Routing (VPR). The proposed algorithm achieves promising performance, in terms of routing channel density.
Citation
Yang, M., Almaini, A. E. A., Wang, L. Y., & Wang, P. (2005, July). An evolutionary approach for symmetrical field programmable gate array placement. Presented at Ph.D. Research in Microelectronics and Electronics,
| Conference Name | Ph.D. Research in Microelectronics and Electronics, |
|---|---|
| Start Date | Jul 25, 2005 |
| End Date | Jul 28, 2005 |
| Publication Date | 2005 |
| Deposit Date | May 8, 2009 |
| Publisher | Institute of Electrical and Electronics Engineers |
| Peer Reviewed | Peer Reviewed |
| Volume | 1 |
| Pages | 169-172 |
| Book Title | Research in Microelectronics and Electronics, 2005 PhD |
| ISBN | 0-7803-9345-7 |
| DOI | https://doi.org/10.1109/RME.2005.1543030 |
| Keywords | Evolutionary compuring; Field Programmable Gate Arrays; MCNC; Benchmark circuits; Versatile Placement and Routing; Routing channel density; |
| Public URL | http://researchrepository.napier.ac.uk/id/eprint/2573 |