A Three-Stage Genetic Algorithm for Compiler Flag and Library Version Selection to Minimize Execution Time

Chan, Chi Ho; Nita, Spyro

Abstract

Existing research in compiler autotuning mainly focuses on selecting optimization flags without configurable values. However, the potential of selecting optimization flags with configurable values, alongside using directory and link flags for library version selection to improve performance, remains largely unexplored. We propose a three-stage Genetic Algorithm (GA) that incrementally selects optimization flags without configurable values, then optimization flags with configurable values, and finally library versions, to minimize software execution time. We also discuss the implementation challenges of the proposed algorithm and outline potential future work.

Citation

Chan, C. H., & Nita, S. (2025, April). A Three-Stage Genetic Algorithm for Compiler Flag and Library Version Selection to Minimize Execution Time. Presented at ICSE 2025: 47th International Conference on Software Engineering, Ottawa, Canada

• Presentation Conference Type: Edited Proceedings
• Conference Name: ICSE 2025: 47th International Conference on Software Engineering
• Start Date: Apr 27, 2025
• End Date: May 3, 2025
• Acceptance Date: Dec 11, 2024
• Deposit Date: Feb 13, 2025
• Publisher: Institute of Electrical and Electronics Engineers
• Peer Reviewed: Peer Reviewed
• Keywords: genetic algorithm, compiler optimization, compiler flag selection, library version selection
• Public URL: http://researchrepository.napier.ac.uk/Output/4118625
• Publisher URL: https://ieeexplore.ieee.org/xpl/conhome/1000691/all-proceedings