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Architecture-aware Precision Tuning with Multiple Number Representation Systems

Cattaneo, Daniele; Chiari, Michele; Fossati, Nicola; Cherubin, Stefano; Agosta, Giovanni

Authors

Daniele Cattaneo

Michele Chiari

Nicola Fossati

Stefano Cherubin

Giovanni Agosta



Abstract

Precision tuning trades accuracy for speed and energy savings, usually by reducing the data width, or by switching from floating point to fixed point representations. However, comparing the precision across different representations is a difficult task. We present a metric that enables this comparison, and employ it to build a methodology based on Integer Linear Programming for tuning the data type selection. We apply the proposed metric and methodology to a range of processors, demonstrating an improvement in performance (up to 9×) with a very limited precision loss (<2.8% for 90% of the benchmarks) on the PolyBench benchmark suite.

Citation

Cattaneo, D., Chiari, M., Fossati, N., Cherubin, S., & Agosta, G. (2021, December). Architecture-aware Precision Tuning with Multiple Number Representation Systems. Presented at 2021 58th ACM/IEEE Design Automation Conference (DAC), San Francisco, CA, USA

Presentation Conference Type Conference Paper (Published)
Conference Name 2021 58th ACM/IEEE Design Automation Conference (DAC)
Start Date Dec 5, 2021
End Date Dec 9, 2021
Acceptance Date Feb 12, 2021
Online Publication Date Nov 13, 2021
Publication Date 2021
Deposit Date Apr 1, 2022
Publicly Available Date Apr 1, 2022
Publisher Institute of Electrical and Electronics Engineers
Series ISSN 0738-100X
Book Title 2021 58th ACM/IEEE Design Automation Conference (DAC)
ISBN 978-1-6654-3274-0
DOI https://doi.org/10.1109/dac18074.2021.9586303
Public URL http://researchrepository.napier.ac.uk/Output/2859689

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