All Outputs (29)

State assignment for sequential circuits using multi-objective genetic algorithm (2011)
Journal Article
Al-Jassani, B. A., Urquhart, N. B., & Almaini, A. E. A. (2011). State assignment for sequential circuits using multi-objective genetic algorithm. IET Computers and Digital Techniques, 5, 296-305. https://doi.org/10.1049/iet-cdt.2010.0045

In this study, a new approach using a multi-objective genetic algorithm (MOGA) is proposed to determine the optimal state assignment with less area and power dissipations for completely and incompletely specified sequential circuits. The goal is to f... Read More about State assignment for sequential circuits using multi-objective genetic algorithm.

Manipulation and optimization techniques for Boolean logic (2010)
Journal Article
Al-Jassani, B. A., Urquhart, N. B., & Almaini, A. E. A. (2010). Manipulation and optimization techniques for Boolean logic. IET computers & digital techniques / IET, 4, 227-239. https://doi.org/10.1049/iet-cdt.2009.0007

In this study, new techniques and algorithms are presented for the derivation and optimisation of mixed polarity Reed Muller (MPRM) and mixed polarity dual Reed Muller (MPDRM) functions. The first algorithm is used for bidirectional conversion betwee... Read More about Manipulation and optimization techniques for Boolean logic.

Optimization of MPRM functions using tabular techniques and genetic algorithms. (2008)
Journal Article
Al-Jassani, B. A., Urquhart, N. B., & Almaini, A. E. A. (2008). Optimization of MPRM functions using tabular techniques and genetic algorithms. The Mediterranean journal of electronics and communications, 4, 115-125

This paper presents new techniques and algorithms to compute and optimize Mixed Polarity Reed Muller logic functions (MPRM) using Tabular techniques and Genetic Algorithms (GA). The first algorithm is used for bidirectional conversion between Fixed P... Read More about Optimization of MPRM functions using tabular techniques and genetic algorithms..

CFAR Adaptive PN Code acquisition for DSSS Systems (2008)
Journal Article
Wei, B., Sharif, M., Binnie, D., & Almaini, A. E. A. (2008). CFAR Adaptive PN Code acquisition for DSSS Systems. The Mediterranean journal of electronics and communications, 4, 37-45

Constant false alarm rate (CFAR) techniques can be used in Pseudo-Noise (PN) code acquisition in Spread Spectrum (SS) communication systems, and all the CFAR techniques perform well in homogeneous background PN code acquisition. However, in non-homog... Read More about CFAR Adaptive PN Code acquisition for DSSS Systems.

Efficient bidirectional conversion between RM and DFRM expansions (2008)
Journal Article
Xu, H., Yang, M., & Almaini, A. E. A. (2008). Efficient bidirectional conversion between RM and DFRM expansions. The Mediterranean journal of electronics and communications, 4, 84-89

A number of different representations of the Boolean function are used in order to find a good circuit representation in terms of area, speed and power performance. In this paper, an effective decomposition method is proposed for the bidirectional tr... Read More about Efficient bidirectional conversion between RM and DFRM expansions.

Techniques for dual forms of Reed-Muller expansion conversion. (2008)
Journal Article
Yang, M., Wang, L. Y., Tong, J. R., & Almaini, A. E. A. (2008). Techniques for dual forms of Reed-Muller expansion conversion. Integration, the VSLI Journal, 41, 113-122. https://doi.org/10.1016/j.vlsi.2007.02.001

Dual forms of Reed-Muller (DFRM) are implemented in OR/XNOR forms, which are based on the features of coincidence operation. Map folding and transformation techniques are proposed for the conversion between Boolean and DFRM expansions. However, map t... Read More about Techniques for dual forms of Reed-Muller expansion conversion..

Exact minimization of large fixed polarity dual form of reed-muller functions (2007)
Journal Article
Yang, M., Xu, H., Wang, L. Y., Tong, J. R., & Almaini, A. E. A. (2007). Exact minimization of large fixed polarity dual form of reed-muller functions. Solid-State and Integrated Circuit Technology, 1931-1933. https://doi.org/10.1109/ICSICT.2006.306532

Dual form of Reed-Muller (DFRM) expansions are implemented in OX/XNOR logic, which are based on the features of coincidence operation and are known as fixed polarity Canonical OR-Coincidence (COC) expansions. An efficient minimization method is propo... Read More about Exact minimization of large fixed polarity dual form of reed-muller functions.

Optimal expression for fixed polarity dual Reed-Muller forms. (2007)
Journal Article
Faraj, K., & Almaini, A. E. A. (2007). Optimal expression for fixed polarity dual Reed-Muller forms. WSEAS Transactions on Circuits and Systems, 6, 364-371

An algorithm for converting between products of sum (POS) and fixed polarity dual Reed-Muller (FPDRM) is proposed in this paper. This algorithm is used to compute the coefficients of POS from FPDRM directly from the truth table of POS. This algorithm... Read More about Optimal expression for fixed polarity dual Reed-Muller forms..

Decision diagrams using 2 variable nodes. (2007)
Journal Article
Oh, P., & Almaini, A. E. A. (2007). Decision diagrams using 2 variable nodes. WSEAS Transactions on Circuits and Systems, 6, 372-379

This paper outlines two variations of Decision Digrams, the 2VBDD and 2VRMBDD. It outlines the background for BDD and RMBDD expanded with respect to one variable and the new 2V(RM)BDD when the expansion is with respect to two variables. Examples are... Read More about Decision diagrams using 2 variable nodes..

Minimization of dual Reed-Muller forms using dual property. (2007)
Journal Article
Faraj, K., & Almaini, A. E. A. (2007). Minimization of dual Reed-Muller forms using dual property. WSEAS Transactions on Circuits and Systems, 6, 9-15

We present two algorithms in this paper: the first is used to convert between Product of Sums (POS) and Positive Polarity Dual Reed-Muller (PPDRM) forms; while the second algorithm generates all the polarity sets from any polarity set for a single ou... Read More about Minimization of dual Reed-Muller forms using dual property..

Fast conversion for large Canonical OR-coincidence functions. (2006)
Journal Article
Yang, M., Wang, L. Y., & Almaini, A. E. A. (2006). Fast conversion for large Canonical OR-coincidence functions. Circuits and Systems, 1643-1646. https://doi.org/10.1109/APCCAS.2006.342080

Fixed Polarity Canonical OR-coincidence (COC) expansions based on inclusive-OR and OR operations are dual forms of fixed polarity Reed-Muller expansions. Traditionally, they are obtained from maxterms of Canonical Products-of-sum (CPOS) expansions. T... Read More about Fast conversion for large Canonical OR-coincidence functions..

An approach to obtain compact multi-level mixed polarity Reed-Muller functions with onset table. (2006)
Journal Article
Wang, L. Y., Xia, Y., Yang, M., & Almaini, A. E. A. (2006). An approach to obtain compact multi-level mixed polarity Reed-Muller functions with onset table. WSEAS Transactions on Circuits and Systems, 5, 625-632

In this paper, an approach to obtain the compact multi-level mixed polarity Reed-Muller (MMPRM) from an FPRM function is discussed. By operating on the onset table with rows (columns) swapping and table dividing, some operators such as extraction of... Read More about An approach to obtain compact multi-level mixed polarity Reed-Muller functions with onset table..

A novel low power FSM partition approach and its implementation. (2005)
Journal Article
Xia, Y., Ye, X., Wang, L. Y., Tao, J., & Almaini, A. E. A. (2005). A novel low power FSM partition approach and its implementation. NORCHIP Conference, 102-105. https://doi.org/10.1109/NORCHP.2005.1596999

A new Finite State Machine (FSM) partioning approach is proposed in this paper. A genetic algorithm (GA) is employed to search the optimal or near optimal solution. A new cost function is used to guide the optimisation. The proposed algorithm is impl... Read More about A novel low power FSM partition approach and its implementation..

FPGA placement using genetic algorithm with simulated annealing. (2005)
Journal Article
Yang, M., Almaini, A. E. A., Wang, L. Y., & Wang, P. (2005). FPGA placement using genetic algorithm with simulated annealing. ASICON, 2, 808-811. https://doi.org/10.1109/ICASIC.2005.1611450

A mixed Genetic Algorithm and Simulated Annealing (GASA) algorithm is used for the placement of symmetrical FPGA. The prpoposed algortithm includes 2 stage processes. In the first stage process it optimizes placement solutions globally using GA. In t... Read More about FPGA placement using genetic algorithm with simulated annealing..

A novel multiple-valued CMOS flip-flop employing multiple-valued clock. (2005)
Journal Article
Xia, Y., Wang, L. Y., & Almaini, A. E. A. (2005). A novel multiple-valued CMOS flip-flop employing multiple-valued clock. Journal of Computer Science and Technology, 20, 237-242. https://doi.org/10.1007/s11390-005-0237-4

A new CMOS quaternary D flip-flop is implemented employing a multiple-valued clock. PSpice simulation shows that the proposed flip-flop has correct operation. Compared with traditional multiple-valued flip-flops, the proposed multiple-valued CMOS fli... Read More about A novel multiple-valued CMOS flip-flop employing multiple-valued clock..

Evolutionary algorithms and their use in the design of sequential logic circuits. (2004)
Journal Article
Ali, B., Almaini, A. E. A., & Kalganova, T. (2004). Evolutionary algorithms and their use in the design of sequential logic circuits. Genetic Programming and Evolvable Machines, 5, 11-29. https://doi.org/10.1023/B%3AGENP.0000017009.11392.e2

In this paper an approach based on an evolutionary algorithm to design synchronous sequential logic circuits with minimum number of logic gates is suggested. The proposed method consists of four main stages. The first stage is concerned with the use... Read More about Evolutionary algorithms and their use in the design of sequential logic circuits..

Expansion of logical function in the OR-coincidence system and the transform between it and maxterm expansion. (2003)
Journal Article
Cheng, J., Chen, X., Faraj, K., & Almaini, A. E. A. (2003). Expansion of logical function in the OR-coincidence system and the transform between it and maxterm expansion. IEE proceedings. Computers and digital techniques, 150, 397-402. https://doi.org/10.1049/ip-cdt%3A20030969

Based on the features of coincidence operation, a canonical OR coincidence (COC) expansion of logical functions in the OR-coincidence algebraic system is proposed, and its mapping expression (dj-map) is given. Then two new operations are introduced a... Read More about Expansion of logical function in the OR-coincidence system and the transform between it and maxterm expansion..

Multilevel logic simplification based on containment recursive paradigm. (2003)
Journal Article
Wang, L. Y., & Almaini, A. E. A. (2003). Multilevel logic simplification based on containment recursive paradigm. IEE proceedings. Computers and digital techniques, 150, 218-226. https://doi.org/10.1049/ip-cdt%3A20030575

This paper addresses a number of fundamental concepts and a novel technique for optimising practical multi-level designs for completely and incompletely specified multi-output functions. Multi-level design is the preferred approach in complex VSLI ci... Read More about Multilevel logic simplification based on containment recursive paradigm..

Power minimization of FPRM functions based on polarity conversion (2003)
Journal Article
Xia, Y., Wu, X., & Almaini, A. E. A. (2003). Power minimization of FPRM functions based on polarity conversion. Journal of Computer Science and Technology, 18(3), 325-331. https://doi.org/10.1007/BF02948902

For an n-variable Boolean function, there are 2[to the nth power] fixed polarity Reed-Muller (FPRM) forms. In this paper, a frame of power dissipation estimation for FPRM functions is presented and the polarity conversion is introduced to minimize th... Read More about Power minimization of FPRM functions based on polarity conversion.

Exact minimisation of large multiple output FPRM functions. (2002)
Journal Article
Almaini, A. E. A., & Wang, L. Y. (2002). Exact minimisation of large multiple output FPRM functions. IEE proceedings. Computers and digital techniques, 149, 203-212. https://doi.org/10.1049/ip-cdt%3A20020674

The properties of the polarity for sum-of-products (SOP) expressions of Boolean functions are formally investigated. A transform matrix S is developed to convert SOP expressions from one polarity to another polarity. It is shown that the effect of SO... Read More about Exact minimisation of large multiple output FPRM functions..